Senior Engineer, Logic

Maharashtra, Maharashtra, India
Jul 24, 2024
Aug 07, 2025
Hybrid
Full-Time
4 Years
Job Description

As Microsoft's cloud business grows, deploying new offerings and hardware infrastructure on time, in high volume, with high quality, and at the lowest cost is crucial. The Cloud Compute Development Organization (CCDO) plays a key role in defining and delivering operational success for hardware manufacturing. We improve planning, quality, delivery, scale, and sustainability related to Microsoft cloud hardware. We are looking for passionate engineers dedicated to customer-focused solutions to help achieve our mission.

We are seeking an experienced DDR Logic Design Engineer to join our team.

Responsibilities

  • Establish micro-architecture for blocks of a cutting-edge DDR memory controller.
  • Implement the micro-architecture in Verilog for DDR IP components or integrate sub-components.
  • Ensure high quality of your design from the perspectives of functionality, timing, CDC (Clock Domain Crossing), RDC (Reset Domain Crossing), and LEC (Logic Equivalence Checking).
  • Collaborate closely with our multi-disciplinary team.
  • Interface with performance modeling, physical design, design for test, and other teams to optimize trade-offs.

Qualifications

  • BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.
  • 4-5 years of experience with DDR4 or DDR5.
  • High-speed digital design experience.
  • Knowledge of the logic design flow, including RTL coding, RTL simulation, synthesis, timing constraints, and timing closure.

Preferred Qualifications

  • Knowledge of front-end tools such as Verilog simulators, connectivity tools, CDC checkers, low power static checkers, and linting tools.
  • Proficiency in Computer Architecture, Digital Design, and CPU/SoC design principles.
  • Experience and knowledge of design clock crossings and power/UPF.
  • Scripting skills using Perl, Tcl, Python, etc.
  • Experience in building and integrating IPs such as memory controllers and DDR.
  • Experience in building functional fabrics using coherent and non-coherent protocols.
  • Familiarity with industry-standard interface protocols such as AXI or CHI.
  • Familiarity with synthesis and STA tools.
  • Strong verbal and written communication skills.

About Microsoft

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations, and ordinances.

If you need assistance and/or a reasonable accommodation due to a disability during the application process, please read more about requesting accommodations.